Semiconductor device power bus system and method

   
   

A semiconductor device a first power pad, a second power pad, a first power network, and a second power network. The first power pad is operable to supply a first potential, and the second power pad is operable to supply a second potential. The first power network defines a first periphery in the semiconductor device and is coupled to the first power pad and the second power pad. The second power network defines a second periphery in the semiconductor device and is coupled to the first power pad and the second power pad.

 
Web www.patentalert.com

< Method and apparatus for sensing resistance values of memory cells

< Magnetic tunneling junction antifuse device

> MRAM data line configuration and method of operation

> Non-volatile semiconductor memory device conducting read operation using a reference cell

~ 00190