An improved method, system, and article of manufacture for reducing via failures is described. In one approach, additional vias or via cuts are inserted into an IC device to increase the number of cuts in a given area. The additional vias or via cuts are inserted until a sufficient via density level has been reached.


< Implementing a user design in a programmable logic device with single event upset mitigation

> Development method for integrated circuits, program storage medium for storing the development method for integrated circuits, and concurrent development system, development program, and development method of ASIC and programmable logic device

> Method and system for implementing deterministic multi-processing

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