A lateral MOS transistor that can include a first device isolating layer formed in a semiconductor substrate; a second device isolating layer formed in the semiconductor substrate, the second device isolation layer having a different width than the first device isolation layer and also having an etched groove provided therein; a gate insulating layer formed in the etched groove; a gate electrode formed over the gate insulating layer; and a source/drain region horizontally arranged in the semiconductor substrate adjacent to the gate electrode.