A method of updating a cache in an integrated circuit is provided. The integrated circuit has the cache, a memory, a processor connected to the cache, and a memory interface connected to the cache, memory and processor. In the method, (a) following a cache miss, first data associated with the cache miss from a first address is requested using the processor, (b) in response to the request, the first data and second data from the memory is fetched using the memory interface, where the second data is stored in the memory adjacent the first data, (c) the cache is updated with the first and second data via the memory interface, and (d) the cache is updated to mark the updated first and second data as valid.

 
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