A method of dividing, along dividing lines, a wafer having function elements formed in areas sectioned by the dividing lines formed in a lattice pattern on the front surface, comprising: a frame holding step for affixing the back surface of the wafer to a dicing tape mounted on an annular frame; a deteriorated layer forming step for forming a deteriorated layer along the dividing lines in the inside of the wafer by applying a pulse laser beam capable of passing through the wafer to the wafer along the dividing lines, from the side of the front surface of the wafer held on the frame; a dividing step for dividing the wafer into individual chips along the dividing lines by exerting external force along the dividing lines where the deteriorated layers have been formed of the wafer held on the frame; an expansion step for enlarging the interval between chips by stretching the dicing tape affixed to the wafer divided into individual chips; and a picking up step for picking up each chip from the expanded dicing tape.

 
Web www.patentalert.com

< Nanostructures, nanogrooves, and nanowires

> Method for fabricating a semiconductor device for reducing a surface potential

~ 00476