A lateral short-channel DMOS includes an N--type epitaxial layer 110 in a P--type semiconductor substrate 108, a P-type well 114 in the N--type epitaxial layer 110 with a channel forming region C, an N+-type source region 116 in the P-type well 114, an N+-type drain region 118 in N--type epitaxial layer 110, and a gate electrode 122 formed via a gate insulating film 120 in at least an upper part of the channel forming region C out of a region from the N+-type source region 116 to the N+-type drain region 118. The lateral short-channel DMOS also includes an N+-type well 140 that is formed in the N--type epitaxial layer 110 and includes a concentration of N-type dopant higher than the N--type epitaxial layer 110 and lower than the N+-type drain region 118, with the N+-type drain region 118 being formed in this N+-type well 140.

 
Web www.patentalert.com

< MRAM device having low-k inter-metal dielectric

< MEMS and method of manufacturing MEMS

> Semiconductor device with an L-shaped/reversed L-shaped gate side-wall insulating film

> Electroplated interconnection structures on integrated circuit chips

~ 00208