A data processing device is used with peripheral devices having addressees and
differing communication response periods. The data processing device includes a
digital processor adapted for selecting different ones of the peripheral devices
by asserting addresses of each selected peripheral device. Addressable programmable
registers hold wait state values representative of distinct numbers of wait states
corresponding to different address ranges. Circuitry responsive to an asserted
address to the peripheral devices asserted by the digital processor generates the
number of wait states represented by the value held in one of the addressable programmable
registers corresponding to the one of the address ranges in which the asserted
address occurs, thereby accommodating the differing communication response periods
of the peripheral devices.
