Method and structure for integrating metal insulator metal capacitor with copper

   
   

An integrated circuit device and methods of producing such device. The device has a substrate, e.g., silicon. An insulating layer is formed overlying the substrate. A copper metal layer is overlying the insulating layer. The device also has an etch stop layer overlying the copper metal layer and an interlayer dielectric material overlying the etch stop layer. The interlayer dielectric material includes an upper surface. A plurality of via openings are defined within a region of the interlayer dielectric layer from the upper surface through the etch stop layer to the copper metal layer. The device has a copper fill material within each of the plurality of via openings to define a plurality of copper structure extending from the upper surface through the etch stop layer to the copper metal layer. A first barrier metal layer is overlying each of the plurality of copper structures to define a first electrode of a capacitor structure. An insulating layer is overlying the first barrier metal layer to define an insulating layer for the capacitor structure. The device has a second barrier metal layer overlying the insulating layer to define the second electrode of the capacitor structure.

 
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