A redundant via design rule check is preferably performed on multi-wide
object class design layouts to ensure that each connection area between
two conductive layers has at least a certain number of vias and/or has
vias placed appropriately to reduce the risk of via failure due to vacancy
concentration of isolated vias. In exemplary embodiments, a redundant via
design rule check preferably ensures that for vias placed within a
connection area of a metal feature (or within a localized region of a
larger metal geometry) that is both greater than a certain width and
greater than a certain area in size, the vias are both sufficient in
number and/or suitable in their location. Vias located inside a geometry
but falling outside a virtual edge of a wide class object may be included
to satisfy exemplary rules.
