An interconnect structure, method of fabricating the interconnect structure and method of designing the interconnect structure for use in semiconductor devices. The interconnect structure includes a damascene metal wire having a pattern of dielectric filled holes.

 
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< Clock signal distribution system and method

< Semiconductor device having multilayer wiring structure

> Semiconductor chip scale package incorporating through-vias electrically connected to a substrate and other vias that are isolated from the substrate, and method of forming the package

> Semiconductor chip and semiconductor device including the same

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