A substrate for packaging a semiconductor chip includes a dielectric layer, a plurality of conductive circuits and bonding pads formed on the dielectric layer, a metal thin deposition layer formed on the conductive circuits and the bonding pads, and a solder mask formed on the dielectric layer and the conductive circuits. The first ends of the bonding pads extend from the conductive circuits. The metal thin deposition layer has at least a portion to protrude out of the conductive circuits and the bonding pads such that the protruding portion of the metal thin position layer is not supported by the conductive circuits or the bonding pads. The bonding pads are exposed form the solder mask except that the second end of each bonding pad is covered by the solder by the solder mask in the manner that the protruding portion of the metal thin deposition layer is embedded in the solder mask.