A method and system for attached processing units accessing a shared memory in
an SMT system. In one embodiment, a system comprises a shared memory. The system
further comprises a plurality of processing elements coupled to the shared memory.
Each of the plurality of processing elements comprises a processing unit, a direct
memory access controller and a plurality of attached processing units. Each direct
memory access controller comprises an address translation mechanism thereby enabling
each associated attached processing unit to access the shared memory in a restricted
manner without an address translation mechanism. Each attached processing unit
is configured to issue a request to an associated direct memory access controller
to access the shared memory specifying a range of addresses to be accessed as virtual
addresses. The associated direct memory access controller is configured to translate
the range of virtual addresses into an associated range of physical addresses.
