A nonvolatile ferroelectric memory device includes a first cell array block
and a second cell array block, each divided into an upper part and a lower
part; sensing amplifiers arranged one by one on multiple bit lines at a
middle portion between the first cell array block and the second cell
array block; a data I/O encoder connected to end portions of the multiple
bit lines for outputting multi-bit signals by encoding outputs of the
sensing amplifiers; and a first reference cell array block and a second
reference cell array block arranged between the first cell array block and
the data I/O encoder and between the second cell array block and the data
I/O encoder.
