The jitter reduction circuit to reduce phase noise in a pulse train, comprises: --a resettable integrator (70) to integrate the pulse train, --a comparator (72) to compare the integrated pulse train with a reference level and to generate a modified pulse train with reduced phase noise, --a crossing time interval detector (94) configured to determine a discrete time interval during which the integrated pulse train crosses the reference level and to reset the integrator between two discrete time intervals determined consecutively.