Methods and apparatus are provided for implementing parameterizable
processor cores and peripherals on a programmable chip. An input
interface such as a wizard allows selection and parameterization of
processor cores, peripherals, as well as other modules. The logic
description for implementing the modules on a programmable chip can be
dynamically generated, allowing extensive parameterization of various
modules. Dynamic generation also allows the delivery of device driver
logic onto a programmable chip. The logic description can include
information for configuring a dynamically generated bus module to allow
connectivity between the modules as well as connectivity with other
on-chip and off-chip components. The logic description, possibly
comprising HDL files, can then be automatically synthesized and provided
to tools for downloading the logic description onto a programmable chip.