The buffer circuit includes a first transistor MP1 having a first end
coupled to an output node N2 and a control node coupled to an input node
N1; a second transistor MN2 coupled to a second end of the first
transistor MP1; a third transistor MN1 coupled to the second transistor
MN2 such that a current in the third transistor MN1 is mirrored to the
second transistor MN2; a first sense device MP3 coupled to the output
node N2; a first current source I2 coupled to the output node N2; a
second current source I1 coupled to the third transistor MN1; a second
sense device MP2 coupled to the third transistor MN1; and a bipolar
device Q1 coupled to the output node N2 and having a base coupled to the
second end of the first transistor MP1.