Method and system for application specific integrated circuit (ASIC) simulation, wherein the ASIC includes plural logical elements is provided. The method includes, monitoring transitions at an output of a logic element of the ASIC; checking if the transition is to an unknown value (X); verifying if the unknown value is based on a design error; forcing the output of the logic element to a known value if the unknown is an unwanted condition; propagating the known value to logic elements in the ASIC; and releasing the known value after a next command.

 
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