A process corner indicator circuit can be included with each die formed from a silicon wafer in order to quickly and easily give a determination of process corner. A clock generator circuit of the indicator circuit can include an array of flip-flop elements, and can be run at a lower operating voltage, such that the differences in delay in the generated timing signal are accentuated for different process corners. The period of the timing signal can be determined using slow and fast clock counters, with the slow clock counting a number of cycles of the timing signal and the fast clock counting a number of cycles of a fixed frequency. The count produced by the fast clock can correspond to the delay in the clock generator circuit, giving an indication of the process corner of the die.