A semiconductor device may be fabricated according to a method that reduces stain difference of a passivation layer in the semiconductor device. The method may include forming top wiring patterns in a substrate, depositing a primary undoped silicate glass (USG) layer on the top wiring patterns to fill a gap between the top wiring patterns, and coating a SOG layer on the substrate on which the primary USG layer has been deposited. Next, the SOG layer on the surface of the substrate may be removed until the primary USG layer is exposed, and a secondary USG layer may be deposited on the substrate on which the primary USG layer has been exposed.

 
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< Method of patterning a matrix into a substrate via multiple, line-and-space, sacrificial, hard mask layers

> Process for growing a dielectric layer on a silicon-containing surface using a mixture of N.sub.2O and O.sub.3

> Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layer
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