A system for reducing power consumption in processing apparatus including
a memory comprises a clock controller for controlling the clock period of
the processing apparatus to switch the processing apparatus to a slow
operating mode wherein the clock period is longer then the time required
to recover from memory standby mode plus the time to execute a read
command in the memory. A memory management module is provided configured
for controlling the status of the memory during the slow operating mode
by: maintaining the in a stand-by mode when no memory read/write
commands are to be executed, and if any said read/write commands are
required to be executed, switching said memory on only for the time
required to perform the memory read/write commands.