An analog to digital converter (ADC) includes a digital ramp generator, an analog voltage comparator, a digital to analog converter (DAC) and a data storage device. The digital ramp generator includes first and second counters. The counter outputs an incremental code to a second counter so that the output code of the second counter varies by the incremental code. The second counter outputs a digital ramp code to respective inputs of the DAC and the data storage device. The DAC outputs an analog voltage to an input of the analog voltage comparator which switches logic states when the output analog voltage of the DAC equals an input voltage received at the analog voltage comparator. The data storage device stores a code of the digital ramp code received at the data storage device at the switching of the logic state of the analog voltage comparator. The first counter varies the incremental code by an incremental step in response to a clock signal.