A sigma-delta (.SIGMA..DELTA.) analog to digital converter with internal
synchronous demodulation responsive to a sample clock, reference clock
and conversion clock including a sample switching circuit responsive to
an AC input to sample the AC input at the sample clock rate; the sample
switching circuit including first and second input switches responsive to
the reference clock for selectively, alternately sampling the positive
and the negative AC input at the reference clock rate; and an inverter
circuit responsive to the reference clock and the sample clock for
reversing the polarity of signals from the sample clock in synchronism
with the reference clock to reverse the sense of the input switches and
synchronously demodulating the AC input within the converter.