A data transfer control device includes: a link controller which analyzes a packet received through a serial bus; an interface circuit which generates interface signals and outputs the interface signals to an interface bus; and a reset signal output circuit which outputs a reset signal to the interface circuit. The link controller analyzes a packet to determine whether or not the received packet includes synchronization signal generation direction information (synchronization signal code). The reset signal output circuit outputs the reset signal to the interface circuit when the link controller has determined that the received packet includes the synchronization signal generation direction information.