A decoding system includes a timing loop for use in error recovery mode operations, in which "fast decode" bit values that are used for timing recovery purposes in the normal modes of operation are replaced, at an appropriate iteration in the error recovery mode, with detected bit values from an iterative detector. The replacement occurs after a reread operation in which the timing loop maintains lock.

 
Web www.patentalert.com

< Optical recording using a waveguide structure and a phase change medium

> Methods and structure for patching embedded firmware

> Vibration compensation based on identification of vibration frequency

~ 00548