An instruction encoding architecture is provided for a microprocessor to
allow atomic modification of privileged architecture registers. The
instructions include an opcode that designates the instructions are to be
executed in privileged (kernel) state only, and are to communicate with
privileged control registers. The instructions designate which of a
plurality of privileged architecture registers is to be modified, which
bit fields within the designated privileged architecture register is to
be modified, and whether the designated bit fields are to be set or
cleared. An instruction atomically sets or clears bit fields within
privileged architecture registers, without reading the privileged
architecture registers into a general purpose register. In addition, the
instruction encoding allows a programmer to specify whether the previous
content of a privileged architecture register is to be saved to a general
purpose register during the atomic modification.