A multi-path accessible semiconductor memory device having a shared memory
area in a DRAM memory cell array that can be randomly accessed by a
plurality of processors is provided. The multi-path accessible
semiconductor memory device includes at least one shared memory area
allocated in a memory cell array, operably connected to ports
corresponding to a plurality of processors, each port used by the
corresponding processor to selective access the shared memory area. The
device further comprises an occupancy state signaling unit to output port
occupancy state information to the processor requesting access to the
shared memory area through the port used for the access request to
indicate whether access to the shared memory area is allowed.