An automated system and method for programming field programmable gate
arrays (FPGAS) is disclosed for implementing user-defined algorithms
specified in a high level language. The system is particularly suited for
use with image processing algorithms and can speed up the process of
implementing and testing a fully written high-level user-defined
algorithm to a matter of a few minutes, rather than the days, weeks or
even months presently required using conventional software tools. The
automated system includes an analyzer module and a mapper module. The
analyzer determines what logic components are required and their
interrelationships, and observes the relative timing between the required
components and their partial products. The mapper module utilizes the
output from the analyzer module and determines where the required logic
components must be placed on a given target FPGA in order to reliably
route, without interference, the required interconnections between
various components and I/O.