A method for fabricating a low cost integrated circuit package (600) includes separating a processed silicon wafer into a plurality of individual die (601) and then positioning the die (603) on a secondary substrate in a face down position for allowing an increased die I/O connection area. The die is covered (605) with one or more epoxy materials to form a group of embedded die packages. One or more pads on the die are then exposed (615) and subsequently connected (617) to an I/O connection in a die I/O connection area. Each of the die are then separated (619) forming singular embedded die packages from the secondary substrate. The method provides a manufacturing process to form a low cost, very high density integrated circuit package using a combination of both wafer scale packaging and wafer level packaging processes.