In a method of forming an array substrate for in-plane switching liquid crystal display device a first metal layer is formed on a substrate and then patterned using a first mask so as to form a gate line having a gate electrode and a common line having a plurality of common electrodes. A gate insulation layer is formed on the substrate to cover the patterned first metal layer. A semiconductor layer is formed on the gate insulation layer using a second mask, wherein the semiconductor layer includes an active layer of pure amorphous silicon and an ohmic contact layer of impurity-doped amorphous silicon. A second metal layer is formed on the gate insulation layer to cover the semiconductor layer and then patterned using a third mask to form a data line having a source electrode, a pixel connecting line having a plurality of pixel electrodes, and a drain electrode that is spaced apart from the source electrode. A channel is formed by etching a portion of the ohmic contact layer between the source and drain electrodes. An alignment layer is formed over the substrate to cover the patterned second metal layer. The substrate having the alignment layer and the source and drain electrode is then thermal-treated in a furnace to cure the alignment layer and to anneal a thin film transistor.