A software agent assembles prefetch hint instructions or prefixes defined
in an instruction set architecture, the instructions/prefixes conveying
prefetch hint information to a processor enabled to execute instructions
according to the instruction set architecture. The prefetch hints are
directed to control operation of one or more hardware memory prefetcher
units included in the processor, providing for increased efficiency in
memory prefetching operations. The hints may optionally provide any
combination of parameters describing a memory reference traffic pattern
to search for, when to begin searching, when to terminate prefetching,
and how aggressively to prefetch. Thus the hardware prefetchers are
enabled to make improved traffic prediction, providing more accurate
results using reduced hardware resources. The hints may include any
combination of specific pattern hints (one/two/N-dimensional strides,
indirect, and indirect-stride), modifiers including sparse and region,
and a prefetch-stop directive. The parameters may include any combination
of a count, a priority and a ramp.