A first solder resist section and a second solder resist section are formed over an upper surface of a wiring board. A semiconductor chip is bonded onto the first solder resist section via an adhesive interposed therebetween. Electrodes of the semiconductor chip are respectively electrically connected to connecting terminals exposed through openings of the second solder resist section via bonding wires. An encapsulating resin is formed over the upper surface of the wiring board so as to cover the semiconductor chip and the bonding wires. A plane dimension of the first solder resist section is smaller than that of the semiconductor chip, and the encapsulating resin is filled even below an outer peripheral portion of a back surface of the semiconductor chip.