A method, system, apparatus, and computer program product is presented for processing instructions. A processor is able to receive multiple types of interruptions while executing instructions, such as aborts, faults, interrupts, and traps. A set of processor fields are used to indicate whether or not one or more trap modes are active, such as a single-step trap mode or a taken-branch trap mode. The activity of a trap mode is conditioned, i.e., restricted, modified, or qualified, with a trap mode conditioning field that indicates whether or not the trap mode should remain active during interruption processing. The use of a trap mode conditioning field allows an interruption handler to run at full speed without being interrupted by the trap mode, yet the trap mode is preserved so that other processing, such as instruction tracing, may continue after interruption processing.

 
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> Computer emulator employing direct execution of compiled functions

> Atomically updating 64 bit fields in the 32 bit AIX kernel

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