A circuit arrangement comprising a high-side semiconductor switch with a first load terminal connected to a first supply terminal receiving an input voltage, a second load terminal connected to an output terminal providing an output signal, and a control terminal, a floating driver circuit connected to the control terminal for driving the semiconductor switch, a level shifter receiving an input signal and providing a floating input signal dependent on the input signal, a floating control logic receiving the output signal and the floating input signal and providing at least one control signal to the floating driver circuit, wherein the floating control logic comprises means for detecting an edge in the output signal and means for generating the control signal dependent on the result of the edge detection.