A voltage regulator is disclosed having a switching regulator portion and an LDO regulator portion on a single chip. The switching portion switches one or more transistors at a high frequency to supply a voltage to a terminal of a series transistor of an LDO regulator. A second terminal of the series transistor provides the output voltage of the LDO regulator. The LDO regulator controls the conductivity of the series transistor to regulate the LDO regulator output voltage to be a desired fixed value. To minimize power dissipation in the series transistor, a feedback signal is taken from the series transistor indicating the level of saturation of the series transistor. This feedback signal is used by the switching regulator to adjust the switching regulator's output voltage such that the voltage supplied to the series transistor is close to the output voltage of the LDO. If there is a change of current, temperature, or process variations, the switching regulator voltage will be adjusted accordingly to keep the series transistor at a desired level in saturation. By minimizing the voltage drop across the series transistor and operating the series transistor at an optimum level of saturation, the overall regulator is highly efficient.

 
Web www.patentalert.com

< Apparatus and method for PFM buck-or-boost converter with smooth transition between modes

> Multi-phase buck converter

> Area-efficient capacitor-free low-dropout regulator

~ 00501