Semiconductor memory devices are provided. The semiconductor memory device
includes a command decoder, a code converter and a code outputting unit.
The command decoder is configured to receive a plurality of command
signals from an external source, decode the plurality of command signals
and generate a mode register reading signal responsive to the decoded
plurality of command signals. The code converter is configured to receive
mode setting codes generated based on the decoded plurality of command
signals and convert the mode setting codes to serial mode setting codes.
The code outputting unit is configured to receive the serial mode setting
codes and output the serial mode setting codes to the external source
responsive to the mode register reading signal. Systems including the
semiconductor memory devices are also provided.