A method of fabricating a flash memory device includes depositing and
etching an insulating layer on a substrate having STI structures,
depositing a first polysilicon layer over the insulating layer and the
substrate, etching the first polysilicon layer to form floating gates and
removing the insulating layer. The method also includes forming a first
photoresist pattern, performing a first ion implantation using the first
photoresist pattern to form first source/drain regions in the substrate
and adjacent to the floating gate, removing the first photoresist
pattern, depositing an ONO layer on the resulting structure, depositing a
second polysilicon layer over the ONO layer, and etching the second
polysilicon layer to form a control gate and at least one select gate.
The method concludes by forming a second photoresist pattern and
performing a second ion implantation using the second photoresist pattern
to form second source/drain regions in the substrate and adjacent to the
select gate.