An exemplary memory array including a plurality of memory cells, each of the memory cells comprises a first ferromagnetic layer, a second ferromagnetic layer spaced apart from the first ferromagnetic layer by a non-magnetic insulating layer and being magnetically coupled to the first ferromagnetic layer by demagnetizing fields from the first ferromagnetic layer, a spacer layer above the second ferromagnetic layer, and a reference layer above the spacer layer. The first ferromagnetic layer, non-magnetic insulating layer, and second ferromagnetic layer in combination function as a data layer of the memory cell.

 
Web www.patentalert.com

< Semiconductor device for IC tag, IC tag, and control method for IC tag for detecting and executing command from radio wave

> Processing system with dedicated local memories and busy identification

~ 00479