An integrated multimedia system having a multimedia processor is disposed
in an integrated circuit having a first host processor system coupled to
the multimedia processor and a second local processor disposed within the
multimedia processor for controlling the operation of the multimedia
processor. A data transfer switch is coupled to the second processor for
transferring data to various modules of the processor, at least one of
which is a data cache. The data transfer switch transfers data in either
direction between the cache and a module within the processor. A data
streamer schedules simultaneous data transfers among the various-modules
disposed within the multimedia processor in accordance with corresponding
channel allocations. An interface unit is coupled to the data streamer
and has a plurality of input/output (I/O) device driver units. A
plurality of external I/O devices are coupled to the plurality of I/O
device driver units via a multiplexer.