A digital to analog converter (DAC) comprises X capacitive DACs that are connected together in series, wherein X is an integer greater than one. Each of the X capacitive DACs comprise M switches wherein M is an integer greater than one; a signal input; a signal output; and M capacitances that communicate with the M switches, respectively, and that have first and second ends and substantially equal capacitance values. The M switches selectively connect the first ends of the M capacitances to the signal output. The M switches connect the second end of a selected one of the M capacitances to the signal input. A first DAC has a signal output that communicates with the signal input of one of the X capacitive DACs.

 
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> Method and apparatus for generating non-binary balanced codes

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