A delta-sigma modulator and A/D converter capable of doubling an oversampling ratio without increasing an operating speed of the circuit at an A/D modulator provided with a delta-sigma modulator which carries out differentiation and integration processing on two channels of analog input. A delta-sigma modulator is configured with a first sampling section that samples a first analog input, a second sampling section that samples a second analog input, a third sampling section that samples an output of a quantizer corresponding to the first analog input, a fourth sampling section that samples the output of the quantizer corresponding to the second analog input, and a switch control circuit that controls analog switches so as to carry out time division processing on integration of the output of the first sampling section and the output of the third sampling section and integration of the output of the second sampling section and the output of the fourth sampling section.

 
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> Sigma-delta modulator with DAC resolution less than ADC resolution and increased dynamic range

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