State machines are identified from a netlist of circuit elements of a user design. Strongly connected components in the netlist are identified as candidates for analysis. The registers of each strongly connected component are identified. An optimal set of inputs and potential state transition logic is identified for the registers in the component. A set of reachable states from an initial state of the registers of a component is determined by simulating state transitions in response to permutations of input values. State machine information is created to assist compilation software in optimizing the user design. Optimizations can include identifying redundant circuit elements based on the set of reachable states and reencoding the state machine with a different state encoding scheme to reduce the amount of state transition and output logic. A subset of the set of reachable states representing a one-hot encoded state machine may be further isolated and optimized.