The area of the circuit to be added for easy testability is reduced.
Operations contained in a behavioral description are extracted in an
operation analyzing unit; when expanding any operation at the time of
behavioral synthesis, if the area of the circuit can be reduced to a
greater extent when a DFT is applied to the operation before expansion, a
parameter indicating that the operation is not to be expanded at the time
of behavioral synthesis is generated and DFT information is added to a
DFT library. A behavioral synthesis unit, in accordance with the
parameter, generates an RTL description without expanding the operation.
A DFT unit implements the DFT by referring to the DFT library, and
thereafter expands the operation.