Efficient computation of complex multiplication results and very efficient
fast Fourier transforms (FFTs) are provided. A parallel array VLIW
digital signal processor is employed along with specialized complex
multiplication instructions and communication operations between the
processing elements which are overlapped with computation to provide very
high performance operation. Successive iterations of a loop of tightly
packed VLIWs are used allowing the complex multiplication pipeline
hardware to be efficiently used. In addition, efficient techniques for
supporting combined multiply accumulate operations are described.