A semiconductor integrated circuit having plural functional block circuits that are controlled by a system clock to an operation state in an ordinary mode and to a deactivated state in a power-saving mode, the semiconductor integrated circuit comprising: a power-saving mode signal generation unit which generates a power-saving mode signal that instructs to shift from the ordinary mode to the power-saving mode; and a power-saving control unit which controls to make clock enable signals, which make the system clock to the plural functional block circuits valid, inactive individually and sequentially with prescribed time intervals at the time when the power-saving mode signal generated by the power-saving mode signal generation unit becomes active.

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