Processors having multiple threads of execution are configured to execute a critical section of code, which the processors execute in turns. The threads of execution are controlled to avoid occurrence of idle time between execution of the critical section by the processors. In particular, the control of the execution threads maintains thread ordering as well as ensures that a context swap occurs after the critical section execution has been completed by each thread of execution.

 
Web www.patentalert.com

< Software change modeling for network devices

> Method, system and program product for specifying and using register entities to configure a simulated or physical digital system

~ 00434