A method for verifying trace widths of a printed circuit board (PCB) layout includes the steps of: loading a PCB layout document from a database; defining a verifying area for a PCB layout specified in the PCB layout document; receiving preset design rules; creating a data structure, and loading information on traces in the verifying area into the data structure; selecting an unverified trace from the data structure; selecting an unverified segment from the selected trace; verifying the selected segment by comparing a width of the selected segment with the rules, and determining whether the selected segment satisfies the rules according to the comparison result; and annotating design rule check (DRC) information if the segment does not satisfy the rules. Other segments of the selected trace and other traces are verified by repeating appropriate of the above-described steps. A related system for implementing the method is also disclosed.