Methods and associated structures for bypassing virtual memory and memory mapping management features provided in a memory controller applied to simpler computing applications. In one aspect hereof, simpler, embedded computing applications may utilize standard memory controllers including cash management and memory component interfacing features but may bypass virtual memory management features within the same memory controller component. Rather, features and aspects hereof intercept memory accesses generated by the memory controller for address translation features and perform simpler address substitution to apply an appropriate translated address to the system bus.

 
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< Memory latency of processors with configurable stride based pre-fetching technique

> Method to efficiently prefetch and batch compiler-assisted software cache accesses

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