A semiconductor structure having a damascene gate structure and a resistive device on a semiconductor substrate is disclosed. The structure includes a first dielectric layer having a first opening and a second opening formed on the semiconductor substrate, and one or more sidewall spacers formed on inner sides of the first opening, in which a portion of the semiconductor substrate is exposed. In addition, the structure includes a coating layer formed on inner sides and a bottom surface of the second opening, a damascene gate structure surrounded by the sidewall spacers formed in the first opening, and a resistive device formed on the coating layer in the second opening.