This invention relates to MRAM technology and new variations on MRAM array
architecture to incorporate certain advantages from both cross-point and
1T-1MTJ architectures. The fast read-time and higher signal-to-noise
ratio of the 1T-1MTJ architecture and the higher packing density of the
cross-point architecture are both exploited by combining certain
characteristics of these layouts. A single access transistor 16 is used
to read multiple MRAM cells, which can be stacked vertically above one
another in a plurality of MRAM array layers arranged in a "Z" axis
direction.