Semiconductor devices, circuits and methods apply both system logic tests
and external interface tests via a common series of boundary shift
registers residing on the semiconductor chip. In an exemplary embodiment,
a test access port receives an external testing signal from a source
outside the semiconductor device, and an on-chip test module (e.g. a
built-in self-test (BIST) module) contained within the semiconductor
device provides an internal testing signal for the system logic. Control
logic selectively provides appropriate input testing signals to the
boundary shift registers and receives and processes appropriate output
signals from the boundary shift registers in each testing mode. Using the
various control techniques, a common set of boundary scan registers may
be used to implement, for example, an IEEE 1149.1 interface, a BIST
isolation wrapper scan chain, a BIST-mode input/output control, or the
like.